Lead Inventors:
Peter Kinget, Ph.D.
STV Reference: IR M05-084 & M08-102
Problem or Unmet Need:
As CMOS circuits continue to miniaturize, analog circuit elements such as inductors and capacitors are unable to scale at the same rate while maintaining a requisite level of quality. However, inductors and capacitors are indispensible elements in analog devices such as radio frequency (RF) and wireless technologies and the devices are limited by these bottlenecks in advancements. The major reasons for this hurdle are that inductors and capacitors are large and as inductors get integrated closer to other circuit elements, the inductor quality degrades.
Details of the Invention:
This invention integrates capacitors and inductors on digital circuits while permitting an inductor with a high quality factor. Using a phase-locked loop (PLL) design, the capacitor is placed underneath the inductor to save space and shield the inductor from the surrounding circuit currents. Along with carefully planned circuit paths, this design allows for a high quality factor for the inductors.
Applications:
§ Inductors and capacitors are indispensible elements in analog devices such as wireless systems (laptops, routers, etc.) mobile phones, RFID tags, contactless smart cards, and radio transmitters
§ This invention reduces the size of analog on-chip circuits while maintaining the requisite level of inductor quality
Advantages:
§ Analog devices can be further miniaturized while the level of inductor quality is maintained
§ Further miniaturization without a loss of quality allows for a greater number of applications and greater flexibility in designs
Patent Status: Patent Pending (
US 2008-0180187 A1)
Licensing Status: Available for Licensing and Sponsored Research Support