Energy-efficient continuous-time digital signal processing system

This technology is a method to implement feedback loops in continuous-time digital processors (CT-DSPs) for improved signal processing.

Unmet Need: Continuous-time digital system for signal processing

Current CT-DSPs have advanced signal processing capabilities by being capable to continuously track event inputs. However, CT-DSPs have thus far only been implemented with feed-forward, transversal filters which have processing limitations. One potential reason for this is that high-order transversal filters request a large number of delay blocks, which consume a large amount of power and chip area. Currently, there are no efficient high-order filters that are both area- and energy-efficient, which are needed to expand signal processing capabilities.

The Technology: Energy efficient continuous-time digital system for effective signal processing

This technology is a CT-DSP system implemented with separate timing and data paths. This CT-DSP system can apply an event-grouping and detection method that can be used in feedback systems with propagation delays. By implementing event-detection into a feedback loop of a continuous-time digital system, the system can automatically stop when there is no event in the system and commence operation when new events are detected by the system, increasing its energy-efficiency. As a result, this technology offers improved signal processing capabilities with increased selectivity, robust frequency response to delay line mismatches, and is efficient in its hardware use.

Applications:

• Signal-processing systems for audio systems
• Signal-processing systems for RF receivers
• Feedback loop system for PID controllers

Advantages:

• Reduces hardware cost for CT-DSPs
• Reduces power consumption
• Expands CT-DSP performance capabilities

Lead Inventor:

Yu Chen Ph.D. (work done in Yannis Tsividis’s lab)

Patent Information:

Patent Issued

Related Publications:

• Chen Y, Zhang X, Lian Y, Manohar R, Tsividis Y. “A continuous-time digital IIR filter with signal-derived timing and fully agile power consumption” IEEE Journal of Solid-State Circuits. 2018; 53(2): 418 – 430.

• Chen Y, Zhang X, Lian Y, Manohar R, Tsividis Y. “A continuous-time digital IIR filter with signal-derived timing, agile power dissipation and synchronous output” 2017 Symposium on VLSI Circuits. 2017: C272 - C273.

• Schell B, Tsividis Y. “A continuous-time ADC/DSP/DAC system with no clock and with activity-dependent power dissipation” IEEE Journal of Solid-State Circuits. 2008 Nov; 43(11): 2472 – 2481.

Tech Ventures Reference:

• IR CU16130

• Licensing Contact: Greg Maskel