{"id":"CU14039","slug":"high-efficiency-switch-mode--CU14039","source":{"id":"CU14039","dataset":"techtransfer","title":"High efficiency switch-mode operational amplifiers","description_":"<p>This technology is a switch-mode operational amplifier architecture that uses phase-shifted pulse-width modulation (PWM) to improve the power efficiency of complementary metal-oxide-semiconductor (CMOS) analog and mixed-signal circuits. </p>\r\r<h2>Unmet Need: Reducing power consumption in analog amplification</h2>\r\r<p>Current analog signal processing systems commonly rely on Class A amplifiers because they provide excellent linearity and simple circuit design, but they suffer from poor power efficiency, wasting a significant portion of consumed energy as heat. As integrated circuits continue to shrink and demand grows for low-power, high-performance CMOS electronics, this inefficiency increases power consumption and thermal management challenges. Improving amplifier efficiency while maintaining the linearity required for precision signal processing is therefore essential for enabling more energy-efficient, scalable mixed-signal integrated circuits. </p>\r\r<h2>The Technology: Phase-shifted Pulse-Width-Modulation for efficient analog amplification</h2>\r\r<p>This technology replaces conventional Class A amplifiers with a switch-mode operational amplifier architecture designed for fully integrated CMOS mixed-signal systems. The architecture uses pulse-width-modulation (PWM), including phase-shifted PWM reference waveforms, to improve power efficiency while maintaining the high linearity required for analog signal processing. The design supports near rail-to-rail output swing, enables scalable digital implementation, and can be converted to voltage-mode analog output using a simple RC filter. </p>\r\r<p>The architecture has been validated through circuit simulations and has been submitted for fabrication to enable experimental testing and verification of its performance. </p>\r\r<h2>Applications:</h2>\r\r<ul>\r<li>Low-power mixed-signal integrated circuits </li>\r<li>Low-power consumer electronics </li>\r<li>Ultra-low voltage electronic systems </li>\r<li>High dynamic range signal processing</li>\r<li>Precision analog signal processing</li>\r<li>Integrated CMOS communication and sensing systems </li>\r<li>Energy-efficient IoT devices </li>\r<li>Industrial circuit design research </li>\r<li>Research tool for improved circuit design </li>\r</ul>\r\r<h2>Advantages:</h2>\r\r<ul>\r<li>Improves power efficiency compared with Class A amplifiers </li>\r<li>Maintains high linearity for signal processing </li>\r<li>Supports low-power CMOS mixed-signal integration </li>\r<li>Scalable digital implementation  </li>\r<li>Achieves near rail-to-rail output swing </li>\r<li>Reduced power consumption </li>\r<li>Reduced heat generation </li>\r<li>Ultra-low voltage operation </li>\r</ul>\r\r<h2>Lead Inventor:</h2>\r\r<p><a href=\"https://www.engineering.columbia.edu/faculty-staff/directory/peter-kinget\">Peter Kinget, Ph.D.</a></p>\r\r<h2>Patent Information:</h2>\r\r<p>Patent Pending (<a href=\"https://patents.google.com/patent/US10084414B2/en?oq=US15%2f021%2c620\">US15/021620</a>)</p>\r\r<h2>Tech Ventures Reference:</h2>\r\r<ul>\r<li><p>IR CU14039</p></li>\r<li><p>Licensing Contact: <a href=\"mailto:techtransfer@columbia.edu\">Greg Maskel</a> </p></li>\r</ul>\r\r","tags":["Amplifier","Analogue electronics","CMOS","Data communication","Energy","Integrated circuit","Internet of things","Low-power electronics","Operational amplifier","Power amplifier classes","Pulse-width modulation","RC circuit","Switched-mode power supply","Voltage"],"file_number":"CU14039","collections":[],"meta_description":"Phase-shifted PWM switch-mode op-amps boost CMOS analog efficiency, maintaining linearity for ultra-low-power, rail-to-rail outputs.","apriori_judge_output":"{\"scores\":{\"novelty\":4.0,\"potential_impact\":4.0,\"readiness\":3.0,\"scalability\":3.0,\"timeliness\":3.0},\"weighted_score\":3.65,\"risks\":[\"Potentially overlapping with existing switch-mode op-amp literature; need clear patent coverage to mitigate freedom-to-operate risk.\",\"Assay and fabrication details for experimental verification are not provided; risk if transition to production proves challenging.\"],\"one_sentence_take\":\"Strong novelty and impact with near-term readiness, but needs stronger feasibility data and IP clarity to achieve higher maturity and scalability.\"}","inventors":["Baradwaj Vigraham","Jayanth Kuppambatti","Peter Kinget"],"manager":"Greg Maskel","depts":["Electrical Engineering"],"divs":["Fu Foundation School of Engineering and Applied Science (SEAS)"],"date_released":"2026-08-14"},"highlight":{},"matched_queries":null,"score":0.0}