This technology is a Field-programmable systolic-array (FPSA), a specialized compute primitive for embedded FPGA fabrics, designed to accelerate AI workloads in resource-constrained systems
Embedded and edge systems demand high performance AI acceleration under tight constrains on power, silicon area, and cost. The use of Edge-AI in resource-constrained systems therefore requires both efficiency and post-deployment adaptability. ASIC-based accelerators deliver high performance and efficiency but lack flexibility and are costly to redesign. Existing FPGAs offer reconfigurability but remain too inefficient for practical AI deployment. To fully enable adaptive AI functions in power, area, and cost-constrained systems, there is a need for both high performance and post-manufacturing flexibility.
This technology is a Field-programmable systolic array (FPSA), a specialized compute primitive for embedded FPGA fabrics, designed to accelerate AI workloads in resource-constrained systems. The FPSA is optimized for tensor-style computations and reduces interconnect pressure and non-compute overhead through a hierarchical organization. This technology combines the efficiency gains of systolic-array organization with the flexibility of reconfigurable logic to meet the demands of resource-constrained systems.
IR CU26320
Licensing Contact: Greg Maskel
