This technology is a distributed differential oscillator global clock network for high clock frequencies and low power requirements in microprocessors.
The global clock is an essential part of most microprocessors and, typically, the clock signal is distributed using a tuned and balanced tree to drive a grid. Ensuring that the signal remains low-skew and low-jitter in the presence of varying processing, voltage, and temperature conditions is especially challenging in light of the increasingly high clock frequencies employed in modern microprocessors. Clock distributions based upon resonance and oscillator array clocks are potential alternatives, however, these can be complicated by non-uniform amplitude or phase.
This technology is a distributed differential oscillator (DDO) global clock distribution network. This technology combines the idea of resonating a clock grid with a set of distributed spiral inductors with the low-latency qualities of an oscillator array distribution. This is achieved by coupling several resonant oscillators via an interconnect to form a distributed differential oscillator global clock network. Each oscillator comprises a spiral inductor and negative differential transconductor to compensate for loss and to maintain oscillation. As such, this technology provides an improved method for generating microprocessors or application specific integrated circuits with less skew and jitter, while dissipating less power.
IR M06-029
Licensing Contact: Greg Maskel
