Lead Inventor:
Simha Sethumadhavan, PhD
Microprocessors' On-Chip Performance Counters have Limited Speed and Accuracy in Reading Timing Data
Modern microprocessors contain on-chip performance counters that can be used to measure microarchitectural events that occur when software is run. The data from these counters can be used by computer architects to improve the design of new microprocessors by identifying hardware bottlenecks; it can also be used to detect security breaches affecting software execution timing. Existing execution profilers and software interfaces to performance counters are limited in the extent to which they can quickly and precisely read timing data from these counters.
Microprocessor Software System Allows Architects to Design Chips to run Software Applications more Efficiently
The technology is a software system for reducing the nondeterminism of multithreaded applications by saving thread execution schedules known to work for certain inputs, and reusing them when similar inputs are subsequently presented to the program. This ensures that a specific thread schedule is reliably used to process a certain class of inputs; a software developer may therefore reliably replicate execution scenarios given certain inputs to identify thread interleave bugs. This technology has been successfully tested on several widely used multithreaded server applications such as the MySQL database and the Apache web server.
Applications:
-- This technology could be used by microprocessor architects to design chips that can run important classes of software applications more efficiently.
-- The high precision profiling made possible by this technology could be used to increase the use of low-level microarchitecture performance information in parallel software engineering and design more efficient parallel processor architectures.
-- This technology could be used to detect possible computer security breaches characterized by anomalous software execution characteristics.
Advantages:
-- Unlike other free/commercial profiling interfaces that access counters through high-overhead operating system kernel calls, this technology provides direct user-space counter access.
-- This technology's counter access times are considerably lower than those of other existing software interfaces.
-- The low overhead imposed by this technology improves the precision of timing data read from performance counters; this improved precision makes it particularly useful in measuring hardware performance when running parallel applications.
Patent Information:
Patent Issued
Licensing Status: Available for Sponsored Research Support
Publications: LIMIT: A Fast Precise Event Monitoring Toolkit, Applications and Architectural Support, HIPC 2010 (to appear), 2010
