Columbia Technology Ventures

MUSE: A More Efficient Error Correcting Software

This technology is an error correcting code algorithm that identifies errors in data with a simplified approach, conserving resources without compromising performance.

Unmet Need: Efficient error correcting codes for data storage and transmission in electronics

Current error correcting codes (ECCs) consume substantial amounts of memory in the form of redundant information known as metadata. While increased metadata can provide improved performance, the tradeoff between productivity and computational resource consumption remains a critical key attribute of ECCs. ECCs that can maintain similar performance while decreasing demand would prove highly advantageous for multiple applications including memory systems, commercial servers, data encryption and security, and supercomputers.

The Technology: An efficient, resource-conscientious error correcting code for electronic data storage and transmission

This error correcting code known as MUSE relies on simple multiplication and division operations to encode, decode, and detect both single and multi-bit errors. By implementing shuffling and aliasing to allow for continuous optimization of its algorithm, MUSE offers a high performance but resource-efficient solution to error corrections in various memory and data storage/transmission systems. Having been demonstrated to achieve 100% successful single error correction with multi-bit correction rates near 80%, MUSE has significant extra memory states, negligible performance overhead, and reasonable area overhead when compared to traditional ECCs. As a result, MUSE can be used for a wide range of electronic applications including memory systems, commercial servers, and data security.

Applications:

  • Improved data storage and memory systems for various electronic devices
  • Data encryption and security system for local and remote servers
  • Commercial servers with improved cost-efficiency

Advantages:

  • Decreased resource consumption
  • Improved shuffling and aliasing allow for continuous optimization
  • Additional extra memory states
  • Comparable performance overhead when compared to traditional ECCs

Lead Inventor:

Lakshminarasimhan Sethumadhavan, Ph.D.

Patent Information:

Patent Pending

Related Publications:

Tech Ventures Reference: