This technology is an integrated circuit design for a stacked-transistor power amplifier (PA) that delivers the high output power required of wireless transmitters while maintaining ideal Class-E efficiency.
High-power amplification is a critical functionality for radio frequency (RF) and millimeter-wave transmitters. However, battery life is a key limitation in wireless systems such as cellular phones, Wi-Fi networks, and Bluetooth devices. Class-E switching PAs can achieve ideal 100%-efficient operation and are, therefore, highly useful in energy-sensitive applications. However, these amplifiers are typically limited in their output power capabilities due to the breakdown voltages associated with a given device technology. Cascaded designs can overcome this limitation and achieve high output powers, but existing stacked-transistor architectures do not realize the ideal Class-E behavior necessary for maximizing energy efficiency. As such, there is a need for a PA that can achieve high output powers with Class-E behavior for energy-efficient amplification.
This technology is a stacked-transistor power amplifier that places a Class-E load network at the drain node of each stacked device to impart a true Class-E behavior to all devices in the stack. Unlike existing staked devices that are only partially successful in achieving Class-E behavior, this technology maintains Class-E-like behavior for all transistors in the stack. As a result, this technology enables high-power switching PAs for RF and millimeter-wave applications to be realized with standard CMOS processes, obviating the need for implementation of separate devices.
Two operational prototypes implemented in 45nm IBM Silicon-on-Insulator (SOI) technology have been successfully demonstrated at 45 GHz.
IR M11-082
Licensing Contact: Greg Maskel