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Multi-phase clock generators have been used to produce clocks with the same frequency and fixed phase difference as the input clock, but current multi-phase clock generators have tradeoffs between accuracy, noise, and power consumption. 7° 8-phase), low integrated jitter (58.8fsrms from 100kHz to 1GHz) and low FOM jitter (-252.7dB) in a mature 65nm technology. Unmet Need: Accurate and efficient clock generator for serial link communication. Nevertheless, the overall bandwidth of carriers faces limitations imposed by the free spectral range, and integrating photonic components with conventional integrated circuit electronics systems continues to present a significant challenge. The Technology: Integrated, compact, and tunable band-interleaving. This technology is an integrated silicon photonic band interleaver for the optimization of spectral sensing throughput for data communication applications using on chip wavelength division multiplexing. Unmet Need: Low skew, low jitter global clock for high frequency microprocessors. As such, this technology provides an improved method for generating microprocessors or application specific integrated circuits with less skew and jitter, while dissipating less power. This technology is a distributed differential oscillator global clock network for high clock frequencies and low power requirements in microprocessors. 
